Starting from basic circuit concepts, dive chapter by chapter into core SMPS topologies and design methods.
This series starts from the most basic voltage step-down needs and guides you through every key aspect of switch-mode power supplies. Each chapter focuses on one topic, with interactive circuit simulations to learn by doing.
Starting from the basic need for voltage step-down, we answer step by step: Why not use a resistor divider? Can a switch reduce voltage? How do capacitors and inductors help? And how do they combine into an efficient DC-DC converter.
In the previous chapter we built the Buck converter. But Buck behaves very differently under varying loads: at heavy load, inductor current never reaches zero (CCM); at light load, current 'breaks' to zero (DCM). This chapter analyzes both modes, derives ripple formulas, and finds the boundary condition for mode transition.
The first two chapters analyzed ideal steady-state conditions: constant VIN, fixed load. In reality, loads change abruptly (CPU idle-to-full) and inputs fluctuate (battery discharge). This chapter demonstrates how open-loop Buck output deviates under these conditions, motivating the need for feedback.
The previous chapter showed three open-loop problems: output rises with light load, drifts with VIN changes, no auto-correction. This chapter uses a real closed-loop circuit (divider sensing + comparator + sawtooth = auto PWM) to address each problem, and discusses proportional feedback limitations.
The previous chapter's proportional feedback improved regulation but with limited accuracy — yet raising gain causes oscillation. This chapter starts from the high-gain oscillation phenomenon, introduces frequency-domain analysis (Bode plots, phase margin), then uses Type-II compensation to achieve both high accuracy and stability.
Diode→MOSFET synchronous rectification, conduction/switching losses, efficiency curves
Inductor saturation, capacitor ESR, MOSFET Rdson/Qg, thermal design